Pitkänen, O., Järvinen, T., Cheng, H., Lorite, G., Dombovari, A., Rieppo, L., Talapatra, S., Duong, H., Tóth, G., Juhász, K., Kónya, Z., Kukovecz, A., Ajayan, P., Vajtai, R., Kordás, K. (2017) On-chip integrated vertically aligned carbon nanotube based super- and pseudocapacitors. Scientific Reports, 7 (1), 16594. doi:10.1038/s41598-017-16604-x
On-chip integrated vertically aligned carbon nanotube based super- and pseudocapacitors
|Author:||Pitkänen, O.1; Järvinen, T.1; Cheng, H.1,2;|
1Microelectronics Research Unit, Faculty of Information Technology and Electrical Engineering, University of Oulu
2Department of Mechanical Engineering, National University of Singapore
3Research Unit of Medical Imaging, Physics and Technology, Faculty of Medicine, University of Oulu
4Department of Physics, Southern Illinois University
5Department of Applied and Environmental Chemistry, and 5MTA-SZTE “Lendület” Porous Nanocomposites Research Group, University of Szeged
6Department of Applied and Environmental Chemistry, and 5MTA-SZTE Reaction Kinetics and Surface Chemistry Research Group, University of Szeged
7Department of Material Science and NanoEngineering, Rice University
|Online Access:||PDF Full Text (PDF, 2.3 MB)|
|Persistent link:|| http://urn.fi/urn:nbn:fi-fe201901313702
|Publish Date:|| 2019-01-31
On-chip energy storage and management will have transformative impacts in developing advanced electronic platforms with built-in energy needs for operation of integrated circuits driving a microprocessor. Though success in growing stand-alone energy storage elements such as electrochemical capacitors (super and pseusocapacitors) on a variety of substrates is a promising step towards this direction. In this work, on-chip energy storage is demonstrated using architectures of highly aligned vertical carbon nanotubes (CNTs) acting as supercapacitors, capable of providing large device capacitances. The efficiency of these structures is further increased by incorporating electrochemically active nanoparticles such as MnOx to form pseudocapacitive architectures thus enhancing device capacitance areal specific capacitance of 37 mF/cm². The demonstrated on-chip integration is up and down-scalable, compatible with standard CMOS processes, and offers lightweight energy storage what is vital for portable and autonomous device operation with numerous advantages as compared to electronics built from discrete components.
|Type of Publication:||
A1 Journal article – refereed
|Field of Science:||
213 Electronic, automation and communications engineering, electronics
216 Materials engineering
We would like to acknowledge the support received from the Micro- and Nanotechnology Center, University of Oulu. O.P. acknowledges Tauno Tönning foundation, Ulla Tuominen foundation, Riitta and Jorma J.Takanen foundation and Finnish Foundation for Technology Promotion for their support. K.L.J., Z.K. and A.K. acknowledge support from the Hungarian National Research, Development and Innovation Office through projects GINOP-2.3.2-15-2016-0013 and K 112531.
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