University of Oulu

Shahabuddin, S., Silvén, O. & Juntti, M. Programmable ASIPs for Multimode MIMO Transceiver. J Sign Process Syst 90, 1369–1381 (2018). https://doi.org/10.1007/s11265-018-1341-3

Programmable ASIPs for multimode MIMO transceiver

Saved in:
Author: Shahabuddin, Shahriar1; Silvén, Olli2; Juntti, Markku1
Organizations: 1Centre for Wireless Communications, University of Oulu, Oulu - 90570, Finland
2Department of Computer Science and Engineering, University of Oulu, Oulu - 90570, Finland
Format: article
Version: accepted version
Access: open
Online Access: PDF Full Text (PDF, 0.5 MB)
Persistent link: http://urn.fi/urn:nbn:fi-fe202002246196
Language: English
Published: Springer Nature, 2018
Publish Date: 2020-02-24
Description:

Abstract

Application specific instruction-set processors (ASIP) are a programmable and flexible alternative of traditional finite state machine (FSM) controlled register-transfer level (RTL) designs for multimode basedband systems. In this paper, we present two ASIPs for small scale multiple-input multiple-output (MIMO) wireless communication systems that demonstrate the soundness and effectiveness of ASIPs for this type of applications. The first ASIP is programmed with multiple MIMO symbol detection algorithms for 4 × 4 systems. The supported detection algorithms are minimum mean-square error (MMSE), two variants of the selective spanning with fast enumeration (SSFE) and K-best list sphere detection (LSD). The second ASIP supports MMSE and zero-forcing dirty paper coding (ZF-DPC) algorithms for a base station (BS) with 4 antennas and for 4 users. Both ASIPs are based on transport triggered architecture (TTA) and are programmed with a retargetable compiler with high level language to meet the time-to-market requirements. The detection and precoding algorithms can be switched in the respective ASIPs based on the error-rate requirements. Depending on the algorithms, MIMO detection ASIP delivers 6.16—66.66 Mbps throughput at a clock frequency of 200 MHz on 90 nm technology. The precoder ASIP provides a throughput of 52.17 and 51.95 Mbps for MMSE and ZF-DPC precoding respectively at a clock frequency of 210 MHz on 90 nm technology.

see all

Series: Journal of signal processing systems for signal image and video technology
ISSN: 1939-8018
ISSN-E: 1939-8115
ISSN-L: 1939-8018
Volume: 90
Issue: 10
Pages: 1369 - 1381
DOI: 10.1007/s11265-018-1341-3
OADOI: https://oadoi.org/10.1007/s11265-018-1341-3
Type of Publication: A1 Journal article – refereed
Field of Science: 213 Electronic, automation and communications engineering, electronics
Subjects:
TTA
Funding: The research is supported by Academy of Finland and 5G Communication with a Heterogeneous, Agile Mobile network in the Pyeongchang winter Olympic competition (5G CHAMPION) project.
Copyright information: © Springer Science+Business Media, LLC, part of Springer Nature 2018. This is a post-peer-review, pre-copyedit version of an article published in Journal of Signal Processing Systems. The final authenticated version is available online at: https://doi.org/10.1007/s11265-018-1341-3.