M. Neitola, "Digital Timing Error Calibration of Time-Interleaved ADC with Low Sample Rate," 2020 IEEE Nordic Circuits and Systems Conference (NorCAS), Oslo, Norway, 2020, pp. 1-7, doi: 10.1109/NorCAS51424.2020.9264991
Digital timing error calibration of time-interleaved ADC with low sample rate
1ITEE/CAS Group, University of Oulu, Finland
|Online Access:||PDF Full Text (PDF, 0.9 MB)|
|Persistent link:|| http://urn.fi/urn:nbn:fi-fe2020113097420
Institute of Electrical and Electronics Engineers,
|Publish Date:|| 2020-11-30
This work suggests a novel procedure of calibrating timing mismatch of time-interleaved Analog-to-Digital conversion. Here, the timing mismatch calibration and compensation are both performed digitally. The proposed method is simple and it is able to find timing errors below the Nyquist rate of the individual analog-to-digital converter. Moreover, the method can be easily modified for digital gain error calibration.
|Pages:||1 - 7|
Proceedings of the 2020 IEEE Nordic Circuits and Systems Conference (NorCAS), 27-28 October 2020, virtual (Oslo, Norway)
IEEE Nordic Circuits and Systems Conference
|Type of Publication:||
A4 Article in conference proceedings
|Field of Science:||
213 Electronic, automation and communications engineering, electronics
This project was funded by Finnish Academy project 325928 and Academy of Finland 6Genesis Flagship under Grant 318927.
|Academy of Finland Grant Number:||
325928 (Academy of Finland Funding decision)
318927 (Academy of Finland Funding decision)
© 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.