University of Oulu

M. Safarpour, T. Z. Deng, J. Massingham, L. Xun, M. Sabokrou and O. Silvén, "Low-Voltage Energy Efficient Neural Inference by Leveraging Fault Detection Techniques," 2021 IEEE Nordic Circuits and Systems Conference (NorCAS), 2021, pp. 1-5, doi: 10.1109/NorCAS53631.2021.9599648

Low-voltage energy efficient neural inference by leveraging fault detection techniques

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Author: Safarpour, Mehdi1; Deng, Tommy Z.2; Massingham, John2;
Organizations: 1Center for Machine Vision and Signal Analysis, University of Oulu, Finland
2Huawei Technologies Sweden AB, Stockholm, Sweden
3University of Southampton, Southampton, UK
4Institute for Research in Fundamental Sciences (IPM), Tehran, Iran
Format: article
Version: accepted version
Access: open
Online Access: PDF Full Text (PDF, 1.7 MB)
Persistent link: http://urn.fi/urn:nbn:fi-fe2021120959917
Language: English
Published: Institute of Electrical and Electronics Engineers, 2021
Publish Date: 2021-12-09
Description:

Abstract

Operating at reduced voltages offers substantial energy efficiency improvement but at the expense of increasing the probability of computational errors due to hardware faults. In this context, we targeted Deep Neural Networks (DNN) as emerging energy hungry building blocks in embedded applications. Without an error feedback mechanism, blind voltage downscaling will result in degraded accuracy or total system failure. To enable safe voltage down-scaling, in this paper two solutions based on Self-Supervised Learning (SSL) and Algorithm Based Fault Tolerance (ABFT) were developed. A DNN model trained on MNIST data-set was deployed on a Field Programmable Gate Array (FPGA) that operated at reduced voltages and employed the proposed schemes. The SSL approach provides extremely low-overhead (≈0.2%) fault detection at the cost of lower error coverage and extra training, while ABFT incurs less than 8% overheads at run-time with close to 100% error detection rate. By using the solutions, substantial energy savings, i.e., up to 40.3%, without compromising the accuracy of the model was achieved.

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ISBN: 978-1-6654-0712-0
ISBN Print: 978-1-6654-0713-7
Pages: 1 - 5
DOI: 10.1109/NorCAS53631.2021.9599648
OADOI: https://oadoi.org/10.1109/NorCAS53631.2021.9599648
Host publication: 2021 IEEE Nordic Circuits and Systems Conference (NorCAS)
Conference: IEEE Nordic Circuits and Systems Conference
Type of Publication: A4 Article in conference proceedings
Field of Science: 113 Computer and information sciences
213 Electronic, automation and communications engineering, electronics
Subjects:
5G
Funding: Part of this work was supported by the 6G Flagship Research Programme under Academy of Finland Grant 318927. Support from the Walter Ahlstr¨om foundation and Riitta ja Jarmo Takasen foundation is acknowledged by the first author.
Academy of Finland Grant Number: 318927
Detailed Information: 318927 (Academy of Finland Funding decision)
Dataset Reference: Source codes used to generate models in this study are available from https://github.com/NeuroFan/LowVoltageDNNonFPGA.git
  https://github.com/NeuroFan/LowVoltageDNNonFPGA.git
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