H. Rezaei, N. Rajatheva and M. Latva-Aho, "High-Throughput Rate-Flexible Combinational Decoders for Multi-Kernel Polar Codes," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 11, pp. 4492-4504, Nov. 2023, doi: 10.1109/TCSI.2023.3311514
High-throughput rate-flexible combinational decoders for multi-kernel polar codes
|Author:||Rezaei, Hossein1; Rajatheva, Nandana1; Latva-Aho, Matti1|
1Centre for Wireless Communications (CWC), University of Oulu, Oulu, Finland
|Online Access:||PDF Full Text (PDF, 4.9 MB)|
|Persistent link:|| http://urn.fi/urn:nbn:fi-fe20231116147054
Institute of Electrical and Electronics Engineers,
|Publish Date:|| 2023-11-16
Polar codes have received growing attention in the past decade and have been selected as the coding scheme for the control channel in the fifth generation (5G) wireless communication systems. However, the conventional polar codes have only been constructed by binary ( 2×2 ) kernel, which poses block length limitation to powers of 2. To attain more flexible block lengths, multi-kernel polar codes are proposed. In this paper, a combinational architecture for multi-kernel polar codes with high throughput is proposed based on successive cancellation decoding algorithm. The proposed scheme can decode pure-binary, pure-ternary ( 3×3 ), and binary-ternary mixed polar codes. The decoder’s architecture is rate-flexible, meaning that a new code rate can be assigned to the decoder at every clock cycle. The proposed architecture is validated by FPGA implementation, and the results reveal that a code of size N=81 achieves the coded throughput of 1664.5 Mbps. A Python-based polar compiler is also proposed to automatically generate the HDL modules for target decoders. A designer can input the target block length and kernel ordering of a polar code and get the required VHDL files automatically.
IEEE transactions on circuits and systems. I, Regular papers
|Pages:||4492 - 4504|
|Type of Publication:||
A1 Journal article – refereed
|Field of Science:||
213 Electronic, automation and communications engineering, electronics
This research has been supported by the Academy of Finland, 6G Flagship Program under Grant 346208.
|Academy of Finland Grant Number:||
346208 (Academy of Finland Funding decision)
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