University of Oulu

Design and implementation of parameterized FPGA hardware components for 5G baseband signal processing algorithms using High-Level Synthesis

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Author: Aura, Teemu
Organizations: 1University of Oulu, Faculty of Information Technology and Electrical Engineering, Department of Communications Engineering, Communications Engineering
Format: ebook
Version: published version
Access: restricted
Persistent link: http://urn.fi/URN:NBN:fi:oulu-201609072696
Language: English
Published: Oulu : T. Aura, 2016
Publish Date: 2016-09-07
Physical Description: 63 p.
Thesis type: Master's thesis (tech)
Tutor: Lahti, Jukka
Reviewer: Janhunen, Janne
Lahti, Jukka
Subjects:
Copyright information: This thesis' fulltext and abstract availability is restricted and they are only accessible from certain Jultika-workstations on the library premises.