University of Oulu

Design and implementation of parameterized FPGA hardware components for 5G baseband signal processing algorithms using High-Level Synthesis

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Author: Aura, Teemu1
Organizations: 1University of Oulu, Faculty of Information Technology and Electrical Engineering, Department of Communications Engineering, Communications Engineering
Format: ebook
Version: published version
Access: restricted
  Theses with restricted access are only available for reading on the e-thesis workstations.
Pages: 63
Persistent link:
Language: English
Published: Oulu : T. Aura, 2016
Publish Date: 2016-09-07
Thesis type: Master's thesis (tech)
Tutor: Lahti, Jukka
Reviewer: Janhunen, Janne
Lahti, Jukka
Copyright information: © Teemu Aura, 2016. This publication is copyrighted. You may download, display and print it for your own personal use. Commercial use is prohibited.